(i) Field of the Invention
The present invention relates to a ferroelectric memory used in, e.g., an IC card to record information thereon.
(ii) Description of the Related Art
FIG. 1 is a block diagram showing an example of a prior art IC card.
This IC card is supplied with required power by electromagnetic coupling with a non-illustrated card read/write unit and provided with an antenna coil 11 for transmitting/receiving data. To the antenna coil 11 are connected a power supply portion 12 for converting power obtained by electromagnetic coupling into a direct-current voltage to be supplied to each part in the IC card and a switching portion 13 for switching between transmission and reception of data.
The receiving side of the switching portion 13 is connected to a central processing unit (which will be referred to as a xe2x80x9cCPUxe2x80x9d hereinafter) 16 through a demodulating portion 14 and decoding portion 15. Further, the CPU 16 is connected to the transmitting side of the switching portion 13 via an encoding portion 17 and a modulating portion 18. The decoding portion 15 and the encoding portion 17 are designed for encoding data to be transmitted/received between the IC card and the card read/write unit. Moreover, the demodulating portion 14 and the modulating portion 18 are used for transmitting/receiving encoded data in the form of a signal suitable for a transmission path.
To the CPU 16 are connected a ROM (Read Only Memory) 19 in which a processing program is stored and a non-volatile memory 20 such as an EEPROM (Electrically Erasable and Programmable Read Only Memory) for storing processed data, and an encrypting portion 21 for encrypting data to be stored in the non-volatile memory 20.
When such an IC card is set in the card read/write unit, electromotive force induced in the antenna coil 11 is given to the power supply portion 12, and the power supply portion 12 generates necessary direct-current power to be fed to each part in the IC card. On the other hand, a signal received by the antenna coil 11 is demodulated into reception data by the demodulating portion 14, and this data is further converted from a cipher text into a plain text by the decoding portion 15. The reception data outputted from the decoding portion 15 is supplied to the CPU 16 to be processed in accordance with a program in the ROM 19. A part of the data obtained as a result of processing is fed to the encrypting portion 21 to be encrypted and further saved in the non-volatile memory 20.
In addition, the data stored in the non-volatile memory 20 is read via the encrypting portion 21 to be processed in the CPU 16. Transmission data as a result of processing executed by the CPU 16 is encrypted by the encoding portion 17 and then modulated by the modulating portion 18 to be transmitted from the antenna coil 11.
As described above, in the IC card, data to be transmitted/received to/from the card read/write unit is encrypted by the decoding portion 15 and the encoding portion 17 to improve privacy, and data to be stored in the non-volatile memory 20 is encrypted by the encrypting portion 21. Consequently, even if the stored content in the non-volatile memory 20 is read by a physical technique such as resin removal or optical analysis, security is protected so as not to decrypt the content of data.
The prior art IC card, however, has the following problem.
That is, the encrypting portion 21 is required in order to encrypt data to be stored in the non-volatile memory 20. The size of the encrypting portion 21 may differ depending on a number of digits of a cipher key or an arithmetic operation method. For example, in case of a 32-bit key, an encryption processing circuit having a scale of approximately 10,000 gates is required. There is, thus, a problem such that a required area of the encrypting portion 21 occupying in the IC card is increased.
In order to eliminate the above-described drawback in the prior art, an object of the present invention is to provide a non-volatile memory which can reduce its necessary area and protect security and a manufacturing method thereof.
To achieve this aim, according to a first aspect of the present invention, a non-volatile memory comprises: storing means which uses as a storage device a ferroelectric material whose remaining polarization characteristic changes due to application of a predetermined voltage under a constant temperature condition and sets the storage device to have either a first remaining polarization characteristic or a second remaining polarization characteristic for each address in accordance with a predetermined address pattern; controlling means for outputting based on the address pattern a control signal indicative of distinction of the remaining polarization characteristic of the storage device selected by an address signal; and reading means for reading data in the storing means by determining in accordance with the control signal a remaining polarization value of the storage device selected by the address signal and outputted from the storing means.
According to the first aspect of the present invention, since the non-volatile memory is configured as described above, the following action is performed.
The storage device of the storing means is selected by the address signal, and the remaining polarization value of its ferroelectric material is outputted to the reading means. Further, the controlling means outputs the control signal indicative of distinction of the remaining polarization characteristic of the storage device selected by the address signal. The reading means determines in accordance with the control signal outputted from the controlling means the remaining polarization value outputted from the storing means, thereby reading data in the storage device.
According to a second aspect of the present invention, in a method for manufacturing a non-volatile memory by which a plurality of insulated gate type transistors and a plurality of ferroelectric capacitors are formed on a silicon substrate and the insulated gate type transistors are electrically connected to the ferroelectric capacitors to form a plurality of memory cells selectable by an address signal, there is added processing that a predetermined memory cell in a plurality of the memory cells is sequentially selected by using the address signal and a predetermined voltage is applied to the ferroelectric capacitor of the selected memory cell under a constant temperature condition to change the remaining polarization characteristic.